as (启动GNU汇编器)

rose1 发表于 2020-08-10 13:44
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在Linux操作系统上,as命令启动GNU汇编器。

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目录

1 as 运行系统环境

2 as 说明

3 as 语法

4 as 语法

5 as 选项

6 as 选项

as 运行系统环境

Linux

as 说明

as节目真的是家族装配。如果在一种体系结构上使用(或已经使用过)GNU汇编器,则在另一种体系结构上使用它时,应该会发现一个相当相似的环境。每个版本与其他版本都有很多共同点,包括目标文件格式,大多数汇编器指令(通常称为伪操作)和汇编器语法。

as主要是为了组装GNU的输出?编译器“ GCC ”用于通过接头“使用LD ”。尽管如此,我们试图使作为装配正确的一切,其他装配在同一台机器将组装。明确记录了所有例外情况。这并不意味着对于相同的体系结构,总是使用与另一个汇编器相同的语法。例如,我们知道680x0汇编语言语法的几个不兼容版本。

每次运行时,它都会恰好汇编一个源程序。源程序由一个或多个文件组成。该标准输入也是一个文件。

你给作为一个命令行具有零个或多个输入文件名。读取输入文件(从左文件名到右)。没有特殊含义的命令行参数(在任何位置)均视为输入文件名。

如果您不提供文件名,它将尝试从标准输入(通常是您的终端机)中读取一个输入文件。您可能需要键入ctrl-D来告知,因为没有更多的程序需要汇编。

如果需要在命令行中显式命名标准输入文件,请使用“ - ”。

如果源为空,则as会生成一个小的空目标文件。

在如在上面写上警告和错误信息到标准错误文件(通常是终端)。当编译器自动运行时,不应发生这种情况。警告报告了一个假设,以便可以继续组装有缺陷的程序;错误报告了一个严重的问题,使组装停止。

如果要通过GNU C编译器进行调用,则可以使用-Wa选项将参数传递给汇编器。汇编器参数必须以逗号分隔(和-Wa)。例如:

gcc -c -g -O -Wa,-alh,-L file.c

这会将两个选项传递给汇编器:-alh(将清单发送到具有高级和汇编源的标准输出)和-L(将符号保留在符号表中)。

通常,您不需要使用-Wa机制,因为许多编译器命令行选项由编译器自动传递给汇编器。您可以使用-v选项调用GNU编译器驱动程序,以精确查看它传递给每个编译过程(包括汇编程序)的选项。

The?as?program is really a family of?assemblers. If you use (or have used) the GNU assembler on one?architecture, you should find a fairly similar?environment?when you use it on another architecture. Each version has much in common with the others, including?object file?formats, most assembler directives (often called pseudo-ops) and assembler?syntax.

as?is primarily intended to assemble the output of the GNU?C?compiler "gcc" for use by the linker "ld". Nevertheless, we've tried to make?as?assemble correctly everything that other assemblers for the same machine would assemble. Any exceptions are documented explicitly. This doesn't mean as always uses the same syntax as another assembler for the same architecture; for example, we know of several incompatible versions of 680x0 assembly language syntax.

Each time you run?as?it assembles exactly one?source?program. The source program is made up of one or more files. The?standard input?is also a file.

You give?as?a?command line?that has zero or more input file names. The input files are read (from left file name to right). A command line?argument?(in any position) that has no special meaning is taken to be an input file name.

If you give as no file names it attempts to read one input file from the as standard input, which is normally your?terminal. You may have to type?ctrl-D?to tell?as?there is no more program to assemble.

Use "--" if you need to explicitly name the standard input file in your command line.

If the source is empty,?as?produces a small, empty object file.

The?as?may write warnings and error messages to the standard error file (usually your terminal). This should not happen when a compiler runs as automatically. Warnings report an assumption made so that as could keep assembling a flawed program; errors report a grave problem that stops the assembly.

If you are invoking as via the GNU C compiler, you can use the?-Wa?option to pass arguments through to the assembler. The assembler arguments must be separated from each other (and the?-Wa) by commas. For example:

gcc -c -g -O -Wa,-alh,-L file.c

This passes two options to the assembler:?-alh?(emit a listing to standard output with high-level and assembly source) and?-L?(retain local symbols in the symbol table).

Usually you do not need to use this?-Wa?mechanism, since many compiler command-line options are automatically passed to the assembler by the compiler. You can call the GNU compiler driver with the?-v?option to see precisely what options it passes to each compilation pass, including the assembler.

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as 语法

as [-a[cdghlns][=file]] [--alternate] [-D] [--compress-debug-sections] 
   [--nocompress-debug-sections] [--debug-prefix-map old=new] 
   [--defsym sym=val] [-f] [-g] [--gstabs] [--gstabs+] [--gdwarf-2] 
   [--help] [-I dir] [-J] [-K] [-L] [--listing-lhs-width=NUM] 
   [--listing-lhs-width2=NUM] [--listing-rhs-width=NUM] 
   [--listing-cont-lines=NUM] [--keep-locals] [-o objfile] [-R] 
   [--reduce-memory-overheads] [--statistics] [-v] [-version] 
   [--version] [-W] [--warn] [--fatal-warnings] [-w] [-x] [-Z] 
   [@FILE] [--size-check=[error|warning]] [--target-help] 
   [target-options] [--|files ...] 
as [-a[cdghlns][=file]] [--alternate] [-D] [--compress-debug-sections] 
   [--nocompress-debug-sections] [--debug-prefix-map old=new] 
   [--defsym sym=val] [-f] [-g] [--gstabs] [--gstabs+] [--gdwarf-2] 
   [--help] [-I dir] [-J] [-K] [-L] [--listing-lhs-width=NUM] 
   [--listing-lhs-width2=NUM] [--listing-rhs-width=NUM] 
   [--listing-cont-lines=NUM] [--keep-locals] [-o objfile] [-R] 
   [--reduce-memory-overheads] [--statistics] [-v] [-version] 
   [--version] [-W] [--warn] [--fatal-warnings] [-w] [-x] [-Z] 
   [@FILE] [--size-check=[error|warning]] [--target-help] 
   [target-options] [--|files ...] 

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as 语法

AArch64:

[-EB|-EL] [-mabi=ABI]

Alpha:

[-mcpu] [-mdebug | -no-mdebug] [-replace | -noreplace] [-relax] [-g] 
[-Gsize] [-F] [-32addr]

ARC:

[-marc[5|6|7|8]] [-EB|-EL]

ARM:

[-mcpu=processor[+extension...]] [-march=architecture[+extension...]] 
[-mfpu=floating-point-format] [-mfloat-abi=abi] [-meabi=ver] [-mthumb] 
[-EB|-EL] [-mapcs-32|-mapcs-26|-mapcs-float| -mapcs-reentrant] 
[-mthumb-interwork] [-k]

Blackfin:

[-mcpu=processor[-sirevision]] [-mfdpic] [-mno-fdpic] [-mnopic]

CRIS:

[--underscore | --no-underscore] [--pic] [-N] [--emulation=criself | 
--emulation=crisaout] [--march=v0_v10 | --march=v10 | --march=v32 | 
--march=common_v10_v32]

D10V:

[-O]

D30V:

[-O|-n|-N]

EPIPHANY:

[-mepiphany|-mepiphany16]

H8/300:

[-h-tick-hex]

i386:

[--32|--n32|--64] [-n] [-march=CPU[+EXTENSION...]] [-mtune=CPU]

i960:

[-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| -AKC|-AMC] [-b] [-no-relax]

IA-64:

[-mconstant-gp|-mauto-pic] [-milp32|-milp64|-mlp64|-mp64] [-mle|mbe] 
[-mtune=itanium1|-mtune=itanium2] [-munwind-check=warning|-munwind-check=error] 
[-mhint.b=ok|-mhint.b=warning|-mhint.b=error] [-x|-xexplicit] 
[-xauto] [-xdebug]

IP2K:

[-mip2022|-mip2022ext]

M32C:

[-m32c|-m16c] [-relax] [-h-tick-hex]

M32R:

[--m32rx|--[no-]warn-explicit-parallel-conflicts| --W[n]p]

M680X0:

[-l] [-m68000|-m68010|-m68020|...]

M68HC11:

[-m68hc11|-m68hc12|-m68hcs12|-mm9s12x|-mm9s12xg] [-mshort|-mlong] 
[-mshort-double|-mlong-double] [--force-long-branches] [--short-branches] 
[--strict-direct-mode] [--print-insn-syntax] [--print-opcodes] 
[--generate-example]

MCORE:

[-jsri2bsr] [-sifilter] [-relax] [-mcpu=[210|340]]

MIPS:

[-nocpp] [-EL] [-EB] [-O[optimizationlevel]] [-g[debuglevel]] [-G num] 
[-KPIC] [-call_shared] [-non_shared] [-xgot [-mvxworks-pic] [-mabi=ABI] 
[-32] [-n32] [-64] [-mfp32] [-mgp32] [-march=CPU] [-mtune=CPU] [-mips1] 
[-mips2] [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] [-mips64] 
[-mips64r2] [-construct-floats] [-no-construct-floats] [-trap] [-no-break] 
[-break] [-no-trap] [-mips16] [-no-mips16] [-mmicromips] [-mno-micromips] 
[-msmartmips] [-mno-smartmips] [-mips3d] [-no-mips3d] [-mdmx] [-no-mdmx] 
[-mdsp] [-mno-dsp] [-mdspr2] [-mno-dspr2] [-mmt] [-mno-mt] [-mmcu] 
[-mno-mcu] [-mfix7000] [-mno-fix7000] [-mfix-vr4120] [-mno-fix-vr4120] 
[-mfix-vr4130] [-mno-fix-vr4130] [-mdebug] [-no-mdebug] [-mpdr] [-mno-pdr]

MMIX:

[--fixed-special-register-names] [--globalize-symbols] [--gnu-syntax] 
[--relax] [--no-predefined-symbols] [--no-expand] [--no-merge-gregs] 
[-x] [--linker-allocated-gregs]

PDP11:

[-mpic|-mno-pic] [-mall] [-mno-extensions] [-mextension|-mno-extension] 
[-mcpu] [-mmachine]

picoJava:

[-mb|-me]

PowerPC:

[-a32|-a64] [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405| 
-m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mppc64| -m620|-me500|
-e500x2|-me500mc|-me500mc64|-me5500|-me6500|-mppc64bridge| -mbooke|-mpower4|
-mpr4|-mpower5|-mpwr5|-mpwr5x|-mpower6|-mpwr6| -mpower7|-mpw7|-ma2|-mcell|
-mspe|-mtitan|-me300|-mcom] [-many] [-maltivec|-mvsx] [-mregnames|
-mno-regnames] [-mrelocatable|-mrelocatable-lib|-K PIC] [-memb] [-mlittle|
-mlittle-endian|-le|-mbig|-mbig-endian|-be] [-msolaris|-mno-solaris] 
[-nops=count]

RX:

[-mlittle-endian|-mbig-endian] [-m32bit-ints|-m16bit-ints] [-m32bit-doubles|
-m64bit-doubles]

s390:

[-m31|-m64] [-mesa|-mzarch] [-march=CPU] [-mregnames|-mno-regnames] 
[-mwarn-areg-zero]

SCORE:

[-EB][-EL][-FIXDD][-NWARN] [-SCORE5][-SCORE5U][-SCORE7][-SCORE3] 
[-march=score7] [-march=score3] [-USE_R1][-KPIC][-O0][-G num][-V]

SPARC:

[-Av6|-Av7|-Av8|-Asparclet|-Asparclite -Av8plus|-Av8plusa|-Av9|-Av9a] 
[-xarch=v8plus|-xarch=v8plusa] [-bump] [-32|-64]

TIC54X:

[-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] [-merrors-to-file|-me]

TIC6X:

[-march=arch] [-mbig-endian|-mlittle-endian] [-mdsbt|-mno-dsbt] 
[-mpid=no|-mpid=near|-mpid=far] [-mpic|-mno-pic]

TILE-Gx:

[-m32|-m64][-EB][-EL]

Xtensa:

[--[no-]text-section-literals] [--[no-]absolute-literals] [--[no-]target-align] 
[--[no-]longcalls] [--[no-]transform] [--rename-section oldname=newname]

Z80:

[-z80] [-r800] [-ignore-undocumented-instructions] [-Wnud] 
[-ignore-unportable-instructions] [-Wnup] [-warn-undocumented-instructions] 
[-Wud] [-warn-unportable-instructions] [-Wup] 
[-forbid-undocumented-instructions] [-Fud] [-forbid-unportable-instructions] 
[-Fup]

AArch64:

[-EB|-EL] [-mabi=ABI]

Alpha:

[-mcpu] [-mdebug | -no-mdebug] [-replace | -noreplace] [-relax] [-g] 
[-Gsize] [-F] [-32addr]

ARC:

[-marc[5|6|7|8]] [-EB|-EL]

ARM:

[-mcpu=processor[+extension...]] [-march=architecture[+extension...]] 
[-mfpu=floating-point-format] [-mfloat-abi=abi] [-meabi=ver] [-mthumb] 
[-EB|-EL] [-mapcs-32|-mapcs-26|-mapcs-float| -mapcs-reentrant] 
[-mthumb-interwork] [-k]

Blackfin:

[-mcpu=processor[-sirevision]] [-mfdpic] [-mno-fdpic] [-mnopic]

CRIS:

[--underscore | --no-underscore] [--pic] [-N] [--emulation=criself | 
--emulation=crisaout] [--march=v0_v10 | --march=v10 | --march=v32 | 
--march=common_v10_v32]

D10V:

[-O]

D30V:

[-O|-n|-N]

EPIPHANY:

[-mepiphany|-mepiphany16]

H8/300:

[-h-tick-hex]

i386:

[--32|--n32|--64] [-n] [-march=CPU[+EXTENSION...]] [-mtune=CPU]

i960:

[-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| -AKC|-AMC] [-b] [-no-relax]

IA-64:

[-mconstant-gp|-mauto-pic] [-milp32|-milp64|-mlp64|-mp64] [-mle|mbe] 
[-mtune=itanium1|-mtune=itanium2] [-munwind-check=warning|-munwind-check=error] 
[-mhint.b=ok|-mhint.b=warning|-mhint.b=error] [-x|-xexplicit] 
[-xauto] [-xdebug]

IP2K:

[-mip2022|-mip2022ext]

M32C:

[-m32c|-m16c] [-relax] [-h-tick-hex]

M32R:

[--m32rx|--[no-]warn-explicit-parallel-conflicts| --W[n]p]

M680X0:

[-l] [-m68000|-m68010|-m68020|...]

M68HC11:

[-m68hc11|-m68hc12|-m68hcs12|-mm9s12x|-mm9s12xg] [-mshort|-mlong] 
[-mshort-double|-mlong-double] [--force-long-branches] [--short-branches] 
[--strict-direct-mode] [--print-insn-syntax] [--print-opcodes] 
[--generate-example]

MCORE:

[-jsri2bsr] [-sifilter] [-relax] [-mcpu=[210|340]]

MIPS:

[-nocpp] [-EL] [-EB] [-O[optimizationlevel]] [-g[debuglevel]] [-G num] 
[-KPIC] [-call_shared] [-non_shared] [-xgot [-mvxworks-pic] [-mabi=ABI] 
[-32] [-n32] [-64] [-mfp32] [-mgp32] [-march=CPU] [-mtune=CPU] [-mips1] 
[-mips2] [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] [-mips64] 
[-mips64r2] [-construct-floats] [-no-construct-floats] [-trap] [-no-break] 
[-break] [-no-trap] [-mips16] [-no-mips16] [-mmicromips] [-mno-micromips] 
[-msmartmips] [-mno-smartmips] [-mips3d] [-no-mips3d] [-mdmx] [-no-mdmx] 
[-mdsp] [-mno-dsp] [-mdspr2] [-mno-dspr2] [-mmt] [-mno-mt] [-mmcu] 
[-mno-mcu] [-mfix7000] [-mno-fix7000] [-mfix-vr4120] [-mno-fix-vr4120] 
[-mfix-vr4130] [-mno-fix-vr4130] [-mdebug] [-no-mdebug] [-mpdr] [-mno-pdr]

MMIX:

[--fixed-special-register-names] [--globalize-symbols] [--gnu-syntax] 
[--relax] [--no-predefined-symbols] [--no-expand] [--no-merge-gregs] 
[-x] [--linker-allocated-gregs]

PDP11:

[-mpic|-mno-pic] [-mall] [-mno-extensions] [-mextension|-mno-extension] 
[-mcpu] [-mmachine]

picoJava:

[-mb|-me]

PowerPC:

[-a32|-a64] [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405| 
-m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mppc64| -m620|-me500|
-e500x2|-me500mc|-me500mc64|-me5500|-me6500|-mppc64bridge| -mbooke|-mpower4|
-mpr4|-mpower5|-mpwr5|-mpwr5x|-mpower6|-mpwr6| -mpower7|-mpw7|-ma2|-mcell|
-mspe|-mtitan|-me300|-mcom] [-many] [-maltivec|-mvsx] [-mregnames|
-mno-regnames] [-mrelocatable|-mrelocatable-lib|-K PIC] [-memb] [-mlittle|
-mlittle-endian|-le|-mbig|-mbig-endian|-be] [-msolaris|-mno-solaris] 
[-nops=count]

RX:

[-mlittle-endian|-mbig-endian] [-m32bit-ints|-m16bit-ints] [-m32bit-doubles|
-m64bit-doubles]

s390:

[-m31|-m64] [-mesa|-mzarch] [-march=CPU] [-mregnames|-mno-regnames] 
[-mwarn-areg-zero]

SCORE:

[-EB][-EL][-FIXDD][-NWARN] [-SCORE5][-SCORE5U][-SCORE7][-SCORE3] 
[-march=score7] [-march=score3] [-USE_R1][-KPIC][-O0][-G num][-V]

SPARC:

[-Av6|-Av7|-Av8|-Asparclet|-Asparclite -Av8plus|-Av8plusa|-Av9|-Av9a] 
[-xarch=v8plus|-xarch=v8plusa] [-bump] [-32|-64]

TIC54X:

[-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] [-merrors-to-file|-me]

TIC6X:

[-march=arch] [-mbig-endian|-mlittle-endian] [-mdsbt|-mno-dsbt] 
[-mpid=no|-mpid=near|-mpid=far] [-mpic|-mno-pic]

TILE-Gx:

[-m32|-m64][-EB][-EL]

Xtensa:

[--[no-]text-section-literals] [--[no-]absolute-literals] [--[no-]target-align] 
[--[no-]longcalls] [--[no-]transform] [--rename-section oldname=newname]

Z80:

[-z80] [-r800] [-ignore-undocumented-instructions] [-Wnud] 
[-ignore-unportable-instructions] [-Wnup] [-warn-undocumented-instructions] 
[-Wud] [-warn-unportable-instructions] [-Wup] 
[-forbid-undocumented-instructions] [-Fud] [-forbid-unportable-instructions] 
[-Fup]

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as 选项

@file

从file中读取命令行选项。读取的选项将插入到原始@ 文件选项中。如果文件不存在或无法读取,则该选项将按字面意义处理,并且不会删除。

文件中的选项用空格分隔。通过将整个选项括在单引号或双引号中,可以在选项中包括空格字符。通过在要包含的字符前面加上反斜杠,可以包含任何字符(包括反斜杠)。该文件本身可能包含其他@ 文件选项;任何这样的选项将被递归处理。

-a[cdghlmns]

以多种方式打开列表:

-ac: 省略错误的条件

-ad: 省略调试指令

-ag: 包括常规信息,例如版本和传递的选项

-ah: 包括高级源

-al: 包括汇编

-am: 包括宏扩展

-an: 省略表格处理

-as: 包括符号

=file: 将列表文件的名称设置为file

您可以组合使用这些选项。例如,使用-aln进行不进行表单处理的程序集列表。该= 文件选项,如果使用的话,必须是最后一个。就其本身而言,-a默认为-ahls。

--alternate

从备用宏模式开始。

--compress-debug-sections

使用zlib压缩DWARF调试部分。将调试部分重命名以.zdebug开头,并且生成的目标文件可能与较旧的链接器和目标文件实用程序不兼容。

--nocompress-debug-sections

不要压缩DWARF调试部分。这是默认值。

-D

忽略了。接受此选项是为了使脚本与调用其他汇编程序兼容。   

--debug-prefix-map old=new

在目录old中组装文件时,请记录调试信息,将其描述为新信息。

--defsym sym=value

在组装输入文件之前,将符号sym定义为值。该值必须是整数常量。与C中一样,前导0x表示十六进制值,而前导0表示八进制值。可以通过使用“ .set”伪操作在源文件中覆盖符号的值。

-f

“快速”-跳过空格和注释预处理(假定源是编译器输出)。

-g, --gen-debug

使用目标首选的任何调试格式为每个汇编程序源代码行生成调试信息。当前这表示STABS,ECOFF或DWARF2。

--gstabs

为每个汇编器行生成stab调试信息。如果调试器可以处理汇编代码,则这可能有助于调试。

--gstabs+

使用可能只有gdb可以处理的GNU扩展,为每个汇编器行生成stab调试信息,这可能会使其他调试器崩溃或拒绝读取程序。这可能有助于调试汇编代码。当前,唯一的GNU扩展名是组装时当前工作目录的位置。

--gdwarf-2

为每个汇编器行生成DWARF2调试信息。如果调试器可以处理汇编代码,则这可能有助于调试。注意-此选项仅受某些目标支持,而不是全部受支持。

--size-check=error, --size-check=warning

针对无效的ELF .size指令发出错误或警告。

--help

打印命令行选项摘要并退出。

--target-help

打印所有目标特定选项的摘要并退出。

-I dir

将目录dir添加到“ .include”指令的搜索列表中。

-J

不要警告已签名的溢出。

-K

当差值表更改为长位移时,发出警告。

-L, --keep-locals

保留(在符号表中)本地符号。这些符号以系统特定的本地标签前缀开头,对于ELF系统,通常为.L;对于传统a.out系统,通常为L。

--listing-lhs-width=number

将汇编程序列表的输出数据列的最大宽度(以字为单位)设置为number。

--listing-lhs-width2=number

将汇编程序列表中的续行的输出数据列的最大宽度(以字为单位)设置为number。

--listing-rhs-width=number

将清单中显示的输入源行的最大宽度设置为数字字节。

--listing-cont-lines=number

将单行输入的列表中打印的最大行数设置为number + 1。

-o objfile

将目标文件输出命名为objfile。

-R

将数据部分折叠到文本部分。

将GAS哈希表的默认大小设置为接近number的素数。增加此值可以减少汇编程序执行任务所需的时间,但会增加汇编程序的内存需求。同样,减小该值可以减少内存需求,但会降低速度。

--reduce-memory-overheads

此选项降低了GAS的内存要求,但以使组装过程更慢为代价。当前,此开关是--hash-size = 4051的同义词,但是将来它可能还会产生其他影响。

--statistics

打印程序集使用的最大空间(以字节为单位)和总时间(以秒为单位)。

--strip-local-absolute

从传出符号表中删除本地绝对符号。

-v, -version

打印as版本。

--version

打印as版本并退出。

-W, --no-warn

禁止显示警告消息。

--fatal-warnings

将警告视为错误。

--warn

不要抑制警告消息或将其视为错误。

-w

忽略了。

-x

忽略了。

-Z

即使发生错误也生成目标文件。

-- | files ...

标准输入或要汇编的源文件。

@file

Read command-line options from?file. The options read are inserted in place of the original?@file?option. If?file?does not exist, or cannot be read, then the option will be treated literally, and not removed.

Options in?file?are separated by?whitespace. A whitespace?character?may be included in an option by surrounding the entire option in either single or double quotes. Any character (including a backslash) may be included by prefixing the character to be included with a backslash. The file may itself contain additional?@file?options; any such options will be processed?recursively.

-a[cdghlmns]

Turn on listings, in any of a variety of ways:

-ac: omit false?conditionals

-ad:?omit?debugging?directives

-ag:?include general information, like as?version?and?options?passed

-ah:?include high-level source

-al:?include assembly

-am:?include?macro?expansions

-an:?omit forms processing

-as:?include symbols

=file:?set the name of the listing file to?file

You may combine these options; for example, use?-aln?for assembly listing without forms processing. The?=file?option, if used, must be the last one. By itself,?-a?defaults to?-ahls.

--alternate

Begin in alternate macro mode.

--compress-debug-sections

Compress DWARF debug sections using zlib. The debug sections are renamed to begin with .zdebug, and the resulting object file may not be compatible with older linkers and object file utilities.

--nocompress-debug-sections

Do not compress DWARF debug sections. This is the default.

-D

Ignored. This option is accepted for script compatibility with calls to other assemblers.

--debug-prefix-map?old=new

When assembling files in directory?old, record debugging information describing them as in?new?instead.

--defsym?sym=value

Define the symbol?sym?to be?value?before assembling the input file. The?value?must be an integer constant. As in C, a leading 0x indicates a hexadecimal value, and a leading 0 indicates an octal value. The value of the symbol can be overridden inside a source file via the use of a ".set" pseudo-op.

-f

"fast"---skip whitespace and comment preprocessing (assume source is compiler output).

-g,?--gen-debug

Generate debugging information for each assembler source line using whichever debug format is preferred by the target. This currently means either STABS, ECOFF or DWARF2.

--gstabs

Generate stabs debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it.

--gstabs+

Generate stabs debugging information for each assembler line, with GNU extensions that probably only gdb can handle, and that could make other debuggers crash or refuse to read your program. This may help debugging assembler code. Currently the only GNU extension is the location of the current working directory at assembling time.

--gdwarf-2

Generate DWARF2 debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it. Note---this option is only supported by some targets, not all of them.

--size-check=error,?--size-check=warning

Issue an error or warning for invalid ELF .size directive.

--help

Print a summary of the command line options and exit.

--target-help

Print a summary of all target specific options and exit.

-I?dir

Add directory dir to the search list for ".include" directives.

-J

Don't warn about signed overflow.

-K

Issue warnings when difference tables altered for long displacements.

-L,?--keep-locals

Keep (in the symbol table) local symbols. These symbols start with system-specific local label prefixes, typically .L for ELF systems or L for traditional a.out systems.

--listing-lhs-width=number

Set the maximum width, in words, of the output data column for an assembler listing to number.

--listing-lhs-width2=number

Set the maximum width, in words, of the output data column for continuation lines in an assembler listing to number.

--listing-rhs-width=number

Set the maximum width of an input source line, as displayed in a listing, to number bytes.

--listing-cont-lines=number

Set the maximum number of lines printed in a listing for a single line of input to number + 1.

-o?objfile

Name the object-file output from as objfile.

-R

Fold the data section into the text section.

Set the default size of GAS's hash tables to a prime number close to number. Increasing this value can reduce the length of time it takes the assembler to perform its tasks, at the expense of increasing the assembler's memory requirements. Similarly reducing this value can reduce the memory requirements at the expense of speed.

--reduce-memory-overheads

This option reduces GAS's memory requirements, at the expense of making the assembly processes slower. Currently this switch is a synonym for --hash-size=4051, but in the future it may have other effects as well.

--statistics

Print the maximum space (in bytes) and total time (in seconds) used by assembly.

--strip-local-absolute

Remove local absolute symbols from the outgoing symbol table.

-v,?-version

Print the as version.

--version

Print the as version and exit.

-W,?--no-warn

Suppress warning messages.

--fatal-warnings

Treat warnings as errors.

--warn

Don't suppress warning messages or treat them as errors.

-w

Ignored.

-x

Ignored.

-Z

Generate an object file even after errors.

--?|?files?...

Standard input, or source files to assemble.

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as 选项

为ARM体系结构(AArch64)的64位模式配置as时,可以使用以下选项:    

-EB

该选项指定应将汇编程序生成的输出标记为已编码为big- endian处理器。

-EL

此选项指定应将汇编程序生成的输出标记为已编码,以便用于little-endian处理器。

阿尔法选项

为Alpha处理器配置as时,以下选项可用:

-mcpu

此选项指定目标处理器。如果试图汇编将不会在目标处理器上执行的指令,则汇编器可能会将指令扩展为宏,也可能会发出错误消息。此选项等效于“ .arch”指令。

可以识别以下处理器名称:21064,“ 21064a”,21066、21068、21164,“ 21164a”,“ 21164pc”,21264,“ 21264a”,“ 21264b”,“ ev4”,“ ev5”,“ lca45”,“ ev5”,“ ev56”,“ pca56”,“ ev6”,“ ev67”,“ ev68”。特殊名称“ all”可用于允许汇编程序接受对任何Alpha处理器有效的指令。

为了支持OSF / 1中有关“ .arch”的现有惯例以及MILO(Linux ARC Bootloader)中的现有惯例,编号的处理器名称(例如21064)启用了特定于处理器的PALcode指令,而“ vlasic”名称(例如“ ev4”)则不会。

-mdebug-no-mdebug

启用或禁用stabs指令和过程描述符的“ .mdebug”封装的生成。默认设置是在看到第一个stabs指令时自动启用“ .mdebug”。

-relax

此选项强制所有重定位都放入目标文件中,而不是节省空间并在组装时解决一些重定位。请注意,此选项不会将所有符号算术传播到目标文件中,因为不能表示所有符号算术。但是,该选项在特定应用中仍然有用。

-replace-noreplace

在组装时和链接时启用或禁用过程调用的优化。这些选项仅适用于VMS目标,“ -replace ”是默认选项。请参阅《 OpenVMS Linker Utility手册》的1.4.1节。

-g

编译器生成调试信息时使用此选项。当gcc使用mips-tfile生成ECOFF的调试信息时,必须将本地标签传递到目标文件。否则,此选项无效。

-Gsize

大于大小的本地公共符号放置在“ .bss”中,而较小的符号放置在“ .sbss”中。

-F-32addr

为了向后兼容,将忽略这些选项。

ARC选项

为ARC处理器配置as时,以下选项可用:

-marc[5|6|7|8]

此选项选择核心处理器变体。

-EB | -EL

选择大端(-EB)或小端(-EL)输出。

ARM选项

为ARM处理器系列配置as时,以下选项可用:

-mcpu=处理器 [ + 扩展... ]

指定目标是哪个ARM处理器变体。

-march=体系结构 [ + 扩展... ]

指定目标使用哪种ARM体系结构变体。

-mfpu=浮点格式

选择目标是哪种浮点体系结构。

-mfloat-abi=abi

选择使用哪个浮点ABI。

-mthumb

启用仅Thumb指令解码。

-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant

选择使用哪个过程调用约定。

-EB | -EL

选择大端(-EB)或小端(-EL)输出。

-mthumb-interwork

指定代码是在考虑Thumb和ARM代码之间的交互作用的情况下生成的。

-k

指定已生成PIC代码。

Blackfin选项

为Blackfin处理器系列配置as时,以下选项可用:

-mcpu=处理器[-sirevision]

此选项指定目标处理器。可选sirevision未在汇编器中使用。在这里,GCC可以轻松地传递其“ -mcpu = ”选项。如果尝试汇编将不会在目标处理器上执行的指令,则汇编器将发出错误消息。可以识别以下处理器名称:“ bf504”,“ bf506”,“ bf512”,“ bf514”,“ bf516”,“ bf518”,“ bf522”,“ bf523”,“ bf524”,“ bf525”,“ bf526” ,“ bf527”,“ bf531”,“ bf532”,“ bf533”,“ bf534”,“ bf535”(尚未实现),“ bf536”,“ bf537”,“ bf538”,“ bf539”,“ bf542”, “ bf542m”,“

-mfdpic

组装FDPIC ABI。

-mno-fdpic-mnopic

禁用-mfdpic。

D10V选项

为D10V处理器配置as时,以下选项可用:

-O

通过并行化指令优化输出。

D30V选件

为D30V处理器配置as时,以下选项可用:

-O

通过并行化指令优化输出。

-n

产生点时发出警告。

-N

当在32位乘法指令后产生一次nop时发出警告。

主显节选项

为Epiphany处理器配置as时,以下选项可用:

-mepiphany

指定同时允许32位和16位指令。这是默认行为。

-mepiphany16

将允许的指令限制为仅16位设置。

i386选项

为i386处理器配置as时,以下选项可用:

--32 | --x32 | --64

选择字长,可以是32位或64位。--32意味着英特尔i386架构,而--x32--64暗示AMD具有32位或64位x86-64架构字分别-size。

这些选项仅在ELF目标文件格式中可用,并且要求已包含必需的BFD支持(在32位平台上,您必须添加--enable-64-bit-bfd来配置启用64位用法和使用x86-64作为目标平台)。

-n

默认情况下,x86 GAS用多字节nop指令(例如leal 0(%esi,1),%esi)替换用于代码段内对齐的多个nop指令。此开关禁用优化。

--划分

在源自SVR4的平台上,字符/被视为注释字符,这意味着它不能在表达式中使用。该--divide选项打开/成一个正常的字符。这不会在开始注释的行的开头禁用/,也不会影响使用#来开始注释。

-march=CPU [ + 扩展... ]

此选项指定目标处理器。如果尝试汇编将不会在目标处理器上执行的指令,则汇编器将发出错误消息。可以识别以下处理器名称:

  • "i8086"
  • "i186"
  • "i286"
  • "i386"
  • "i486"
  • "i586"
  • "i686"
  • "pentium"
  • "pentiumpro"
  • "pentiumii"
  • "pentiumiii"
  • "pentium4"
  • "prescott"
  • "nocona"
  • "core"
  • "core2"
  • "corei7"
  • "l1om"
  • "k1om"
  • "k6"
  • "k6_2"
  • "athlon"
  • "opteron"
  • "k8"
  • "amdfam10"
  • "bdver1"
  • "bdver2"
  • "bdver3"
  • "btver1"
  • "btver2"
  • "generic32"
  • "generic64"

除了基本的指令集,还可以告诉汇编器接受各种扩展助记符。例如,“ -march = i686 + sse4 + vmx ”用sse4和vmx扩展了i686。当前支持以下扩展:    

  • "8087"
  • "287"
  • "387"
  • "no87"
  • "mmx"
  • "nommx"
  • "sse"
  • "sse2"
  • "sse3"
  • "ssse3"
  • "sse4.1"
  • "sse4.2"
  • "sse4"
  • "nosse"
  • "avx"
  • "avx2"
  • "adx"
  • "rdseed"
  • "prfchw"
  • "noavx"
  • "vmx"
  • "vmfunc"
  • "smx"
  • "xsave"
  • "xsaveopt"
  • "aes"
  • "pclmul"
  • "fsgsbase"
  • "rdrnd"
  • "f16c"
  • "bmi2"
  • "fma"
  • "movbe"
  • "ept"
  • "lzcnt"
  • "hle"
  • "rtm"
  • "invpcid"
  • "clflush"
  • "lwp"
  • "fma4"
  • "xop"
  • "syscall"
  • "rdtscp"
  • "3dnow"
  • "3dnowa"
  • "sse4a"
  • "sse5"
  • "svme"
  • "abm"
  • "padlock"

注意,不是扩展基本指令集,而是以“ no ” 开头的扩展助记符撤消了各自的功能。

“ .arch ”指令与-march一起使用时,“。arch ”指令将优先。    

-mtune=CPU

此选项指定要优化的处理器。与-march选项一起使用时,仅生成-march选项指定的处理器指令。

有效的CPU值与-march = CPU的处理器列表相同。

-msse2avx

此选项指定汇编器应使用VEX前缀对SSE指令进行编码。

-msse-check=none-msse-check=warning-msse-check=error

这些选项控制汇编器是否应检查SSE指令。-msse-check = none将使汇编器不检查SSE指令,这是默认设置。-msse-check = warning将使汇编器对任何SSE指令发出警告。-msse-check = error将使汇编器为任何SSE指令发出错误。

-mavxscalar=128-mavxscalar=256

这些选项控制汇编器应如何编码标量AVX指令。-mavxscalar = 128将使用128位向量长度(默认值)对标量AVX指令进行编码。-mavxscalar = 256将对具有256位向量长度的标量AVX指令进行编码。

-mmnemonic=att-mmnemonic=intel

此选项指定用于匹配指令的指令助记符。“ .att_mnemonic ”“ .intel_mnemonic ”指令将优先。

-msyntax=att-msyntax=intel

此选项指定处理指令时的指令语法。“ .att_syntax ”“ .intel_syntax ”指令将优先。

-mnaked-reg

此选项指定寄存器不需要%前缀。“ .att_syntax ”“ .intel_syntax ”指令将优先。

英特尔80960选件

为Intel 80960处理器配置as时,以下选项可用:

-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC

指定目标是960体系结构的哪个变体。

-b

添加代码以收集有关所采用分支的统计信息。

-no-relax

对于长位移,请勿更改比较和分支指令;必要时出错。

IP2K选项

为Ubicom IP2K系列配置as时,以下选项可用:

-mip2022ext

指定允许扩展的IP2022指令。

-mip2022

恢复默认行为,将允许的指令限制为基本IP2022的指令。

M32C和M16C选项

为瑞萨M32C和M16C处理器配置as时,可以使用以下选项:

-m32c

汇编M32C指令。

-m16c

汇编M16C指令(默认设置)。

-relax

启用对链接时间放宽的支持。    

-h-tick-hex

除0x00样式外,还支持H'00样式的十六进制常量。

M32R选项

将Renesas M32R(以前称为Mitsubishi M32R)系列配置为as时,可以使用以下选项:

--m32rx

指定M32R系列中的哪个处理器为目标。默认值通常是M32R,但是此选项将其更改为M32RX。

--warn-explicit-parallel-conflicts or --Wp

遇到可疑的并行构造时产生警告消息。

--no-warn-explicit-parallel-conflicts or --Wnp

遇到可疑的并行构造时,不要产生警告消息。

68000系列选件

当为 Motorola 68000系列配置as时,以下选项可用。

-l

将对未定义符号的引用缩短为一个单词,而不是两个单词。

-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -mcpu32 | -m5200

指定68000系列中的哪个处理器为目标。默认值通常是68020,但是可以在配置时更改。

-m68881 | -m68882 | -mno-68881 | -mno-68882

目标计算机具有(或没有)浮点协处理器。默认值为68020、68030和cpu32的协处理器。尽管基本的68000与68881不兼容,但是可以指定两者的组合,因为可以与主处理器一起仿真协处理器指令。

-m68851 | -mno-68851

目标机器具有(或没有)内存管理单元协处理器。默认情况是假定MMU为68020及更高版本。

PD11选项

为DEC PDP -11 配置as时,可以使用以下选项:

-mpic | -mno-pic

生成与位置无关(或与位置有关)的代码。缺省值为-mpic。

-mall-mall-extensions

启用所有指令集扩展。这是默认值。

-mno-extensions

禁用所有指令集扩展。

-mextension | -mno-extension

启用(或禁用)特定的指令集扩展。

-mcpu

启用特定CPU支持的指令集扩展,并禁用所有其他扩展。    

-mmachine

启用特定机器型号支持的指令集扩展,并禁用所有其他扩展。

PicoJava选项

为picoJava处理器配置as时,以下选项可用:

-mb

生成“大端”格式输出。

-ml

生成“ little endian”格式的输出。

68HC11和68HC12选项

当为 Motorola 68HC11或68HC12系列配置as时,以下选项可用。

-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg

指定目标处理器。默认值由构建汇编器时的配置选项定义。

--xgate-ramoffset

指示链接器将RAM地址从S12X地址空间偏移到XGATE地址空间中。

-mshort

指定使用16位整数ABI。

-mlong

指定使用32位整数ABI。

-mshort-double

指定使用32位双ABI。

-mlong-double

指定使用64位双ABI。

--force-long-branches

相对分支变成绝对分支。这涉及条件分支,无条件分支和子例程的分支。

-S | --short-branches

当偏移量超出范围时,请勿将相对分支变为绝对分支。

--strict-direct-mode

当指令不支持直接寻址模式时,请勿将直接寻址模式转换为扩展寻址模式。

--print-insn-syntax

出现错误时打印指令的语法。

--print-opcodes

使用语法打印指令列表,然后退出。

--generate-example

为每个可能的指令打印指令示例,然后退出。此选项仅对as有用。

SPARC选项

为SPARC体系结构配置as时,以下选项可用:

-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite -Av8plus | -Av8plusa | -Av9 | -Av9a

明确选择SPARC体系结构的变体。

-Av8plus 和-Av8plusa 选择32位环境。-Av9 和-Av9a 选择64位环境。

-Av8plusa 和-Av9a 启用带有UltraSPARC扩展名的SPARC V9指令集。

-xarch=v8plus | -xarch=v8plusa

为了与Solaris v9汇编程序兼容。这些选项分别等效于-Av8plus-Av8plusa。

-bump

当汇编器切换到另一种体系结构时发出警告。

c54x选项

为'c54x架构配置as时,以下选项可用。

-远距模式

启用扩展寻址模式。所有地址和重定位都将采用扩展寻址(通常为23位)。

-mcpu=CPU_VERSION

设置要为其编译的CPU版本。

-merrors-to-file 文件名

将错误输出重定向到文件,以解决在shell中不支持此类行为的损坏系统。

MIPS选项

为MIPS处理器配置as时,以下选项可用。

-G num

此选项设置可以用“ gp”寄存器隐式引用的对象的最大大小。仅对于使用ECOFF格式的目标(例如运行Ultrix的DECstation)接受该目标。预设值为8。

-EB

生成“大端”格式输出。

-EL

生成“ little endian”格式的输出。

-mips1, -mips2, -mips3, -mips4, -mips5, -mips32, -mips32r2, -mips64, -mips64r2

为特定的MIPS指令集体系结构级别生成代码。-mips1是一个别名-march = R3000,-mips2是一个别名-march = R6000,-mips3是一个别名-march = R4000-mips4为别名-march = R8000。-mips5,-mips32,-mips32r2,-mips64-mips64r2分别对应于通用MIPS V,MIPS32,MIPS32版本2,MIPS64和MIPS64版本2 ISA处理器。

-march=CPU

为特定的MIPS cpu生成代码。

-mtune=cpu

计划和调整特定的MIPS CPU。

-mfix7000, -mno-fix7000

如果在以下两个指令中发生了对mfhi或mflo指令的目标寄存器的读取,则会插入nops。

-mdebug, -no-mdebug

使stabs样式的调试输出进入ECOFF风格的.mdebug部分,而不是标准的ELF .stabs部分。

-mpdr, -mno-pdr

控制“ .pdr”部分的生成。

-mgp32, -mfp32

寄存器大小通常是从ISA和ABI推论得出的,但是这些标志会强制将某些寄存器组始终视为32位宽。-mgp32控制通用寄存器的大小,-mfp32控制浮点寄存器的大小。

-mips16, -no-mips16

生成MIPS 16处理器的代码。这等效于将“ .set mips16”放在汇编文件的开头。-no-mips16关闭此选项。

-mmicromips, -mno-micromips

为microMIPS处理器生成代码。这等效于将“ .set micromips”放在汇编文件的开头。-mno-micromips关闭此选项。这等效于在汇编文件的开头放置“ .set nomicromips”。

-msmartmips, -mno-smartmips

启用对MIPS32指令集的SmartMIPS扩展。这等效于将“ .set smartmips”放在汇编文件的开头。-mno-smartmips关闭此选项。

-mips3d, -no-mips3d

为MIPS-3D专用扩展生成代码。这告诉汇编器接受MIPS-3D指令。-no-mips3d关闭此选项。

-mdmx, -no-mdmx

为MDMX应用程序特定扩展生成代码。这告诉汇编器接受MDMX指令。-no-mdmx关闭此选项。

-mdsp, -mno-dsp

为DSP Release 1 Application Specific Extension生成代码。这告诉汇编程序接受DSP Release 1指令。-mno-dsp关闭此选项。

-mdspr2, -mno-dspr2

为DSP Release 2 Application Specific Extension生成代码。此选项暗含-mdsp。这告诉汇编器接受DSP Release 2指令。-mno-dspr2关闭此选项。

-mmt, -mno-mt

生成MT应用程序特定扩展的代码。这告诉汇编器接受MT指令。-mno-mt关闭此选项。

-mmcu, -mno-mcu

生成用于MCU专用扩展的代码。这告诉汇编器接受MCU指令。-mno-mcu关闭此选项。

--construct-floats, --no-construct-floats

--no-construct-floats由值的两半加载到两个单宽度浮点寄存器组成双倍宽度寄存器选项禁用双宽度浮点常量的构造。默认情况下,选择--construct-floats,以允许构造这些浮点常量。

--emulation=name

该选项使a在所有方面都像为其他目标配置的那样进行仿真,包括输出格式(仅在ELF和ECOFF之间选择),对可能生成调试信息或存储符号表信息的伪操作码的处理以及默认字节序。可用的配置名称为:mipsecoff,mipself,mipslecoff,mipsbecoff,mipslelf,mipsbelf。前两个不会更改默认字节序,而默认字节序与配置了汇编程序的主要目标的默认字节序无关。其他名称则按名称中的b或l将默认值更改为little-endian或big-endian。在任何情况下,使用-EB-EL都会覆盖字节序选择。

当前仅当配置的主要目标是MIPS ELF或ECOFF目标时,才支持此选项。此外,在配置时使用--enable-targets = ...指定的主要目标或其他目标,必须同时支持其他格式。例如,Irix 5配置包括对这两者的支持。

最终,该选项将支持更多的配置,并对汇编程序的行为进行更细粒度的控制,并且将为更多的处理器提供支持。

-nocpp

因为忽略此选项。它被接受为与本机工具兼容。

--trap, --no-trap, --break, --no-break

控制如何处理乘法溢出和除零。--trap--no-break(是同义词)会出现陷阱异常(仅适用于2级及更高级别的指令集体系结构);--break--no-trap(也是同义词,也是默认值)带有break异常。

-n

使用此选项时,每次从宏生成nop指令时,as都会发出警告。

MCore选项

为MCore处理器配置as时,以下选项可用。

-jsri2bsr, -nojsri2bsr

启用或禁用JSRI到BSR的转换。默认情况下,启用此功能。命令行选项-nojsri2bsr可用于禁用它。

-sifilter, -nosifilter

启用或禁用硅过滤器行为。默认情况下,这是禁用的。可以使用-sifilter命令行选项覆盖默认值。

-relax

改变跳跃说明以延长位移。

-mcpu=[210|340]

在目标硬件上选择CPU类型。这控制可以汇编的指令。

-EB

组装一个大端序目标。

-EL

组装一个小端序目标。

PowerPC选项

为PowerPC处理器配置as时,以下选项可用。

-a32

生成ELF32或XCOFF32。

-a64

生成ELF64或XCOFF64。

-K PIC

在ELF标志中设置EF_PPC_RELOCATABLE_LIB。

-mpwrx | -mpwr2

生成POWER / 2(RIOS2)的代码。

-mpwr

生成POWER(RIOS1)的代码

-m601

生成PowerPC 601的代码。

-mppc, -mppc32, -m603, -m604

生成PowerPC 603/604的代码。

-m403, -m405

生成PowerPC 403/405的代码。

-m440

生成PowerPC 440的代码。BookE和一些405指令。

-m464

生成PowerPC 464的代码。

-m476

生成PowerPC 476的代码。

-m7400, -m7410, -m7450, -m7455

生成PowerPC 7400/7410/7450/7455的代码。

-m750cl

生成PowerPC 750CL的代码。

-mppc64, -m620

生成PowerPC 620/625/630的代码。

-me500, -me500x2

为摩托罗拉e500核心组件生成代码。

-me500mc

为飞思卡尔e500mc核心组件生成代码。

-me500mc64

为飞思卡尔e500mc64核心复合体生成代码。

-me5500

为飞思卡尔e5500核心组件生成代码。

-me6500

为飞思卡尔e6500核心组件生成代码。

-mspe

生成用于Motorola SPE指令的代码。

-mtitan

生成AppliedMicro Titan核心复合体的代码。

-mppc64bridge

生成PowerPC 64的代码,包括网桥insns。

-mbooke

生成32位BookE的代码。

-ma2

生成A2体系结构的代码。

-me300

生成PowerPC e300系列的代码。

-maltivec

使用AltiVec指令为处理器生成代码。

-mvsx

使用矢量标量(VSX)指令为处理器生成代码。

-mpower4, -mpwr4

生成Power4体系结构的代码。

-mpower5, -mpwr5, -mpwr5x

生成Power5体系结构的代码。

-mpower6, -mpwr6

生成Power6体系结构的代码。

-mpower7, -mpwr7

生成Power7体系结构的代码。

-mcell

生成用于单元宽带引擎体系结构的代码。

-mcom

生成代码Power / PowerPC常用指令。

-many

生成任何体系结构(PWR / PWRX / PPC)的代码。

-mregnames

允许寄存器使用符号名。

-mno-regnames

不允许寄存器使用符号名。

-mrelocatable

支持GCC的-mrelocatable选项。

-mrelocatable-lib

支持GCC的-mrelocatable-lib选项。

-memb

将ELF标志中的PPC_EMB位置1。

-mlittle, -mlittle-endian, -le

生成用于小端字节序计算机的代码。

-mbig, -mbig-endian, -be

为大型字节序计算机生成代码。

-msolaris

为Solaris生成代码。

-mno-solaris

不为Solaris生成代码。

-nops=count

如果alignment指令插入的计数多于nops,请在开头放置一个分支以跳过nops的执行。

s390选项

为s390处理器系列配置as时,以下选项可用。

-m31, -m64

选择字长,可以是31/32位或64位。

-mesa, -mzarch

选择架构模式,即企业系统架构(esa)或z / Architecture模式(zarch)。

-march=处理器

指定目标是哪个s390处理器型号,即g6,g6,z900,z990,z9-109,z9-ec或z10。

-mregnames, -mno-regnames

允许或禁止寄存器的符号名称。

-mwarn-areg-zero

只要指定了基址或索引寄存器的操作数,但运算结果为零,就发出警告。

TMS320C6000选项

为TMS320C6000处理器配置as时,以下选项可用。

-march=arch

启用(仅)体系结构架构中的指令。默认情况下,所有指令都是允许的。

可以接受以下arch值:“ c62x”,“ c64x”,“ c64x +”,“ c67x”,“ c67x +”,“ c674x”。

-mdsbt, -mno-dsbt

所述-mdsbt选项使汇编程序生成具有值1的“Tag_ABI_DSBT”属性,表示该代码是使用DSBT寻址。该-mno-DSBT选项,默认,使标签有值0,表明该代码不使用DSBT寻址。如果将不同类型(DSBT和非DSBT)的对象链接在一起,则链接器将发出警告。

-mpid=no, -mpid=near, -mpid=far

所述-mpid =选项使汇编程序生成与表示数据的形式使用的寻址由代码的值“Tag_ABI_PID”属性。-mpid = no(缺省值)指示与位置有关的数据寻址,-mpid = near指示与使用近DP寻址的GOT访问相关的位置无关的寻址,-mpid = far指示与使用远DP寻址的GOT访问相关的位置无关的寻址。如果使用此选项的不同设置构建的对象链接在一起,则链接器将发出警告。

-mpic, -mno-pic

所述-mpic选项使汇编程序生成具有值1的“Tag_ABI_PIC”属性,表示该代码是使用位置无关的代码寻址,“ -mno-PIC ”选项,默认情况下,使所述标签具有值0,表示与位置有关的代码寻址。如果将不同类型的对象(与位置相关和与位置无关)链接在一起,则链接器将发出警告。

-mbig-endian, -mlittle-endian

生成指定字节序的代码。默认为little-endian。

TILE-Gx选项

为TILE-Gx处理器配置as时,以下选项可用:

-m32 | -m64

选择字长,可以是32位或64位。

-EB | -EL

选择字节序,大字节序(-EB)或小字节序(-EL)。

Xtensa选项

为Xtensa处理器配置as时,以下选项可用:

--text-section-literals | --no-text-section-literals

控制文字池的处理。缺省值为--no-text-section-literals,它将文字放在输出文件的单独部分中。这允许将文字池放置在数据RAM / ROM中。使用--text-section-literals,文字会散布在text节中,以使其尽可能接近其引用。这对于大型汇编文件可能是必需的,否则这些文字将超出文本部分中“ L32R”指令的范围。这些选项仅影响通过PC相关的“ L32R”指令引用的文字。绝对模式“ L32R”指令的文字分别处理。

--absolute-literals | --no-absolute-literals

向汇编器指示“ L32R”指令是使用绝对寻址还是PC相对寻址。如果处理器包括绝对寻址选项,则默认值为使用绝对“ L32R”重定位。否则,只能使用相对于PC的“ L32R”重定位。

--target-align | --no-target-align

启用或禁用自动对齐以减少分支惩罚,但要花一些代码大小。默认情况下启用此优化。请注意,汇编程序将始终对齐具有固定对齐要求的指令,例如“ LOOP”。

--longcalls | --no-longcalls

启用或禁用呼叫指令转换,以允许跨更大范围的地址进行呼叫。当呼叫目标可能超出范围时,应使用此选项。它可能会降低代码大小和性能,但是当调用最终在范围内时,链接程序通常可以优化不必要的开销。默认值为--no-longcalls。

--transform | --no-transform

启用或禁用Xtensa指令的所有汇编程序转换,包括松弛和优化。默认值为--transform ; 仅在极少数情况下必须严格按照汇编源代码中的说明使用--no-transform。使用--no-transform会导致超出范围的指令操作数出错。

--rename-section oldname=newname

将“旧名称”部分重命名为“新名称”。可以多次使用此选项来重命名多个节。

Z80选件

为Z80系列处理器配置as时,以下选项可用:

-z80

组装Z80处理器。    

-r800

组装R800处理器。

-ignore-undocumented-指令, -Wnud

组装无证的Z80指令,这些指令也可在R800上使用而不会发出警告。

-ignore-unportable-指令, -Wnup

组装所有未记录的Z80说明,而不发出警告。

-warn-undocumented-指令, -Wud

针对同样适用于R800的无证Z80指令发出警告。

-warn-unportable-指令, -Wup

针对未在R800上运行的未记录的Z80指令发出警告。

-forbid-undocumented-指令, -Fud

将所有未记录的说明视为错误。

-forbid-unportable-指令, -Fup

将在R800上不起作用的未记录的Z80指令视为错误。

The following options are available when?as?is configured for the 64-bit mode of the?ARM?Architecture (AArch64):

-EB

This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian?processor.

-EL

This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor.

Alpha Options

The following options are available when?as?is configured for an?Alpha?processor:

-mcpu

This option specifies the target processor. If an attempt is made to assemble an instruction which will not execute on the target processor, the assembler may either expand the instruction as a macro or issue an error message. This option is equivalent to the ".arch" directive.

The following processor names are recognized: 21064, "21064a", 21066, 21068, 21164, "21164a", "21164pc", 21264, "21264a", "21264b", "ev4", "ev5", "lca45", "ev5", "ev56", "pca56", "ev6", "ev67", "ev68". The special name "all" may be used to allow the assembler to accept instructions valid for any Alpha processor.

To support existing practice in OSF/1 with respect to ".arch", and existing practice within MILO (the Linux ARC bootloader), the numbered processor names (e.g., 21064) enable the processor-specific PALcode instructions, while the "electro-vlasic" names (e.g., "ev4") do not.

-mdebug,?-no-mdebug

Enables or disables the generation of ".mdebug" encapsulation for stabs directives and procedure descriptors. The default is to automatically enable ".mdebug" when the first stabs directive is seen.

-relax

This option forces all relocations to be put into the object file, instead of saving space and resolving some relocations at assembly time. Note that this option does not propagate all symbol arithmetic into the object file, because not all symbol arithmetic can be represented. However, the option can still be useful in specific applications.

-replace,?-noreplace

Enables or disables the optimization of procedure calls, both at assemblage and at link time. These options are only available for?VMS?targets and "-replace" is the default. See section 1.4.1 of the OpenVMS Linker Utility Manual.

-g

This option is used when the compiler generates debug information. When gcc is using mips-tfile to generate debug information for ECOFF, local labels must be passed through to the object file. Otherwise, this option has no effect.

-Gsize

A local common symbol larger than size is placed in ".bss", while smaller symbols are placed in ".sbss".

-F,?-32addr

These options are ignored for backward compatibility.

ARC Options

The following options are available when?as?is configured for an ARC processor:

-marc[5|6|7|8]

This option selects the core processor variant.

-EB?|?-EL

Select either big-endian (-EB) or little-endian (-EL) output.

ARM Options

The following options are available when?as?is configured for the?ARM?processor family:

-mcpu=processor[+extension...]

Specify which ARM processor variant is the target.

-march=architecture[+extension...]

Specify which ARM architecture variant is used by the target.

-mfpu=floating-point-format

Select which?Floating Point?architecture is the target.

-mfloat-abi=abi

Select which floating point ABI is in use.

-mthumb

Enable Thumb only instruction decoding.

-mapcs-32?|?-mapcs-26?|?-mapcs-float?|?-mapcs-reentrant

Select which procedure calling convention is in use.

-EB?|?-EL

Select either big-endian (-EB) or little-endian (-EL) output.

-mthumb-interwork

Specify that the code has been generated with interworking between Thumb and ARM code in mind.

-k

Specify that PIC code has been generated.

Blackfin Options

The following options are available when?as?is configured for the Blackfin processor family:

-mcpu=processor[-sirevision]

This option specifies the target processor. The optional sirevision is not used in assembler. It's here such that GCC can easily pass down its "-mcpu=" option. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: "bf504", "bf506", "bf512", "bf514", "bf516", "bf518", "bf522", "bf523", "bf524", "bf525", "bf526", "bf527", "bf531", "bf532", "bf533", "bf534", "bf535" (not implemented yet), "bf536", "bf537", "bf538", "bf539", "bf542", "bf542m", "bf544", "bf544m", "bf547", "bf547m", "bf548", "bf548m", "bf549", "bf549m", "bf561", and "bf592".

-mfdpic

Assemble for the FDPIC ABI.

-mno-fdpic,?-mnopic

Disable?-mfdpic.

D10V Options

The following option is available when?as?is configured for a D10V processor:

-O

Optimize output by parallelizing instructions.

D30V Options

The following options are available when?as?is configured for a D30V processor:

-O

Optimize output by parallelizing instructions.

-n

Warn when nops are generated.

-N

Warn when a nop after a 32-bit multiply instruction is generated.

Epiphany Options

The following options are available when?as?is configured for an Epiphany processor:

-mepiphany

Specifies that the both 32 and 16 bit instructions are allowed. This is the default behavior.

-mepiphany16

Restricts the permitted instructions to just the 16 bit set.

i386 Options

The following options are available when?as?is configured for an?i386?processor:

--32?|?--x32?|?--64

Select the word size, either 32 bits or 64 bits.?--32?implies Intel i386 architecture, while?--x32?and?--64?imply?AMD?x86-64 architecture with 32-bit or 64-bit?word-size respectively.

These options are only available with the ELF object file format, and require that the necessary BFD support has been included (on a 32-bit platform you have to add?--enable-64-bit-bfd?to configure enable 64-bit usage and use x86-64 as target platform).

-n

By default, x86 GAS replaces multiple nop instructions used for alignment within code sections with multi-byte nop instructions such as leal 0(%esi,1),%esi. This switch disables the optimization.

--divide

On SVR4-derived platforms, the character / is treated as a comment character, which means that it cannot be used in expressions. The?--divide?option turns / into a normal character. This does not disable / at the beginning of a line starting a comment, or affect using # for starting a comment.

-march=CPU[+EXTENSION...]

This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized:

  • "i8086"
  • "i186"
  • "i286"
  • "i386"
  • "i486"
  • "i586"
  • "i686"
  • "pentium"
  • "pentiumpro"
  • "pentiumii"
  • "pentiumiii"
  • "pentium4"
  • "prescott"
  • "nocona"
  • "core"
  • "core2"
  • "corei7"
  • "l1om"
  • "k1om"
  • "k6"
  • "k6_2"
  • "athlon"
  • "opteron"
  • "k8"
  • "amdfam10"
  • "bdver1"
  • "bdver2"
  • "bdver3"
  • "btver1"
  • "btver2"
  • "generic32"
  • "generic64"

In addition to the basic instruction set, the assembler can be told to accept various extension mnemonics. For example, "-march=i686+sse4+vmx" extends i686 with sse4 and vmx. The following extensions are currently supported:

  • "8087"
  • "287"
  • "387"
  • "no87"
  • "mmx"
  • "nommx"
  • "sse"
  • "sse2"
  • "sse3"
  • "ssse3"
  • "sse4.1"
  • "sse4.2"
  • "sse4"
  • "nosse"
  • "avx"
  • "avx2"
  • "adx"
  • "rdseed"
  • "prfchw"
  • "noavx"
  • "vmx"
  • "vmfunc"
  • "smx"
  • "xsave"
  • "xsaveopt"
  • "aes"
  • "pclmul"
  • "fsgsbase"
  • "rdrnd"
  • "f16c"
  • "bmi2"
  • "fma"
  • "movbe"
  • "ept"
  • "lzcnt"
  • "hle"
  • "rtm"
  • "invpcid"
  • "clflush"
  • "lwp"
  • "fma4"
  • "xop"
  • "syscall"
  • "rdtscp"
  • "3dnow"
  • "3dnowa"
  • "sse4a"
  • "sse5"
  • "svme"
  • "abm"
  • "padlock"

Note that rather than extending a basic instruction set, the extension mnemonics starting with "no" revoke the respective functionality.

When the ".arch" directive is used with?-march, the ".arch" directive will take precedent.

-mtune=CPU

This option specifies a processor to optimize for. When used in conjunction with the?-march?option, only instructions of the processor specified by the?-march?option will be generated.

Valid CPU values are identical to the processor list of?-march=CPU.

-msse2avx

This option specifies that the assembler should encode?SSE?instructions with VEX prefix.

-msse-check=none,?-msse-check=warning,?-msse-check=error

These options control if the assembler should check SSE instructions.?-msse-check=none?will make the assembler not to check SSE instructions, which is the default.?-msse-check=warning?will make the assembler issue a warning for any SSE instruction.?-msse-check=error?will make the assembler issue an error for any SSE instruction.

-mavxscalar=128,?-mavxscalar=256

These options control how the assembler should encode scalar AVX instructions.?-mavxscalar=128?will encode scalar AVX instructions with 128bit vector length, which is the default.?-mavxscalar=256?will encode scalar AVX instructions with 256bit vector length.

-mmnemonic=att,?-mmnemonic=intel

This option specifies instruction mnemonic for matching instructions. The ".att_mnemonic" and ".intel_mnemonic" directives will take precedent.

-msyntax=att,?-msyntax=intel

This option specifies instruction syntax when processing instructions. The ".att_syntax" and ".intel_syntax" directives will take precedent.

-mnaked-reg

This option specifies that?registers?don't require a?%?prefix. The ".att_syntax" and ".intel_syntax" directives will take precedent.

Intel 80960 Options

The following options are available when?as?is configured for the Intel 80960 processor:

-ACA?|?-ACA_A?|?-ACB?|?-ACC?|?-AKA?|?-AKB?|?-AKC?|?-AMC

Specify which variant of the 960 architecture is the target.

-b

Add code to collect statistics about branches taken.

-no-relax

Do not alter compare-and-branch instructions for long displacements; error if necessary.

IP2K Options

The following options are available when?as?is configured for the Ubicom IP2K series:

-mip2022ext

Specifies that the extended IP2022 instructions are allowed.

-mip2022

Restores the default behavior, which restricts the permitted instructions to just the basic IP2022 ones.

M32C and M16C Options

The following options are available when?as?is configured for the Renesas M32C and M16C processors:

-m32c

Assemble M32C instructions.

-m16c

Assemble M16C instructions (the default).

-relax

Enable support for link-time relaxations.

-h-tick-hex

Support H'00 style?hex?constants in addition to 0x00 style.

M32R Options

The following options are available when?as?is configured for the Renesas M32R (formerly Mitsubishi M32R) series:

--m32rx

Specify which processor in the M32R family is the target. The default is normally the M32R, but this option changes it to the M32RX.

--warn-explicit-parallel-conflicts?or?--Wp

Produce warning messages when questionable parallel constructs are encountered.

--no-warn-explicit-parallel-conflicts?or?--Wnp

Do not produce warning messages when questionable parallel constructs are encountered.

68000 Series Options

The following options are available when?as?is configured for the Motorola?68000?series.

-l

Shorten references to undefined symbols, to one word instead of two.

-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -mcpu32 | -m5200

Specify what processor in the 68000 family is the target. The default is normally the 68020, but this can be changed at configuration time.

-m68881 | -m68882 | -mno-68881 | -mno-68882

The target machine does (or does not) have a floating-point coprocessor. The default is to assume a coprocessor for 68020, 68030, and cpu32. Although the basic 68000 is not compatible with the 68881, a combination of the two can be specified, since it's possible to do?emulation?of the coprocessor instructions with the main processor.

-m68851 | -mno-68851

The target machine does (or does not) have a memory-management unit coprocessor. The default is to assume an MMU for 68020 and up.

PD11 Options

The following options are available when?as?is configured for the?DEC?PDP-11:

-mpic | -mno-pic

Generate position-independent (or position-dependent) code. The default is?-mpic.

-mall,?-mall-extensions

Enable all instruction set extensions. This is the default.

-mno-extensions

Disable all instruction set extensions.

-mextension?|?-mno-extension

Enable (or disable) a particular instruction set extension.

-mcpu

Enable the instruction set extensions supported by a particular CPU, and disable all other extensions.

-mmachine

Enable the instruction set extensions supported by a particular machine model, and disable all other extensions.

PicoJava Options

The following options are available when?as?is configured for a picoJava processor:

-mb

Generate "big endian" format output.

-ml

Generate "little endian" format output.

68HC11 and 68HC12 Options

The following options are available when?as?is configured for the Motorola 68HC11 or 68HC12 series.

-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg

Specify what processor is the target. The default is defined by the configuration option when building the assembler.

--xgate-ramoffset

Instruct the linker to offset RAM addresses from S12X address space into XGATE address space.

-mshort

Specify to use the 16-bit integer ABI.

-mlong

Specify to use the 32-bit integer ABI.

-mshort-double

Specify to use the 32-bit double ABI.

-mlong-double

Specify to use the 64-bit double ABI.

--force-long-branches

Relative branches are turned into absolute ones. This concerns conditional branches, unconditional branches and branches to a sub routine.

-S | --short-branches

Do not turn relative branches into absolute ones when the offset is out of range.

--strict-direct-mode

Do not turn the direct addressing mode into extended addressing mode when the instruction does not support direct addressing mode.

--print-insn-syntax

Print the syntax of instruction in case of error.

--print-opcodes

Print the list of instructions with syntax and then exit.

--generate-example

Print an example of instruction for each possible instruction and then exit. This option is only useful for testing as.

SPARC Options

The following options are available when?as?is configured for the?SPARC?architecture:

-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite -Av8plus | -Av8plusa | -Av9 | -Av9a

Explicitly select a variant of the SPARC architecture.

-Av8plus?and?-Av8plusa?select a 32 bit environment.?-Av9?and?-Av9a?select a 64 bit environment.

-Av8plusa?and?-Av9a?enable the SPARC V9 instruction set with UltraSPARC extensions.

-xarch=v8plus | -xarch=v8plusa

For compatibility with the Solaris v9 assembler. These options are equivalent to?-Av8plus?and?-Av8plusa, respectively.

-bump

Warn when the assembler switches to another architecture.

c54x Options

The following options are available when?as?is configured for the 'c54x architecture.

-mfar-mode

Enable extended addressing mode. All addresses and relocations will assume extended addressing (usually 23 bits).

-mcpu=CPU_VERSION

Sets the CPU version being compiled for.

-merrors-to-file?FILE NAME

Redirect error output to a file, for broken systems which don't support such behavior in the shell.

MIPS Options

The following options are available when?as?is configured for a?MIPS?processor.

-G?num

This option sets the largest size of an object that can be referenced implicitly with the "gp" register. It is only accepted for targets that use ECOFF format, such as a DECstation running Ultrix. The default value is 8.

-EB

Generate "big endian" format output.

-EL

Generate "little endian" format output.

-mips1, -mips2, -mips3, -mips4, -mips5, -mips32, -mips32r2, -mips64, -mips64r2

Generate code for a particular MIPS Instruction Set Architecture level.?-mips1?is an alias for?-march=r3000,?-mips2?is an alias for?-march=r6000,?-mips3?is an alias for?-march=r4000?and?-mips4?is an alias for?-march=r8000.?-mips5,?-mips32,?-mips32r2,?-mips64, and?-mips64r2?correspond to generic MIPS V, MIPS32, MIPS32 Release 2, MIPS64, and MIPS64 Release 2 ISA processors, respectively.

-march=CPU

Generate code for a particular MIPS cpu.

-mtune=cpu

Schedule and tune for a particular MIPS cpu.

-mfix7000, -mno-fix7000

Cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions.

-mdebug, -no-mdebug

Cause stabs-style debugging output to go into an ECOFF-style .mdebug section instead of the standard ELF .stabs sections.

-mpdr, -mno-pdr

Control generation of ".pdr" sections.

-mgp32, -mfp32

The register sizes are normally inferred from the ISA and ABI, but these flags force a certain group of registers to be treated as 32 bits wide at all times.?-mgp32?controls the size of general-purpose registers and?-mfp32?controls the size of floating-point registers.

-mips16, -no-mips16

Generate code for the MIPS 16 processor. This is equivalent to putting ".set mips16" at the start of the assembly file.?-no-mips16?turns off this option.

-mmicromips, -mno-micromips

Generate code for the microMIPS processor. This is equivalent to putting ".set micromips" at the start of the assembly file.?-mno-micromips?turns off this option. This is equivalent to putting ".set nomicromips" at the start of the assembly file.

-msmartmips, -mno-smartmips

Enables the SmartMIPS extension to the MIPS32 instruction set. This is equivalent to putting ".set smartmips" at the start of the assembly file.?-mno-smartmips?turns off this option.

-mips3d, -no-mips3d

Generate code for the MIPS-3D Application Specific Extension. This tells the assembler to accept MIPS-3D instructions.?-no-mips3d?turns off this option.

-mdmx, -no-mdmx

Generate code for the MDMX Application Specific Extension. This tells the assembler to accept MDMX instructions.?-no-mdmx?turns off this option.

-mdsp, -mno-dsp

Generate code for the DSP Release 1 Application Specific Extension. This tells the assembler to accept DSP Release 1 instructions.?-mno-dsp?turns off this option.

-mdspr2, -mno-dspr2

Generate code for the DSP Release 2 Application Specific Extension. This option implies?-mdsp. This tells the assembler to accept DSP Release 2 instructions.?-mno-dspr2?turns off this option.

-mmt, -mno-mt

Generate code for the MT Application Specific Extension. This tells the assembler to accept MT instructions.?-mno-mt?turns off this option.

-mmcu, -mno-mcu

Generate code for the MCU Application Specific Extension. This tells the assembler to accept MCU instructions.?-mno-mcu?turns off this option.

--construct-floats, --no-construct-floats

The?--no-construct-floats?option disables the construction of double width floating point constants by loading the two halves of the value into the two single width floating point registers that make up the double width register. By default,?--construct-floats?is selected, allowing construction of these floating point constants.

--emulation=name

This option causes as to emulate as configured for some other target, in all respects, including output format (choosing between ELF and ECOFF only), handling of pseudo-opcodes which may generate debugging information or store symbol table information, and default endianness. The available configuration names are: mipsecoff, mipself, mipslecoff, mipsbecoff, mipslelf, mipsbelf. The first two do not alter the default endianness from that of the primary target for which the assembler was configured; the others change the default to little- or big-endian as indicated by the b or l in the name. Using?-EB?or?-EL?will override the endianness selection in any case.

This option is currently supported only when the primary target as is configured for is a MIPS ELF or ECOFF target. Furthermore, the primary target or others specified with?--enable-targets=...?at configuration time must include support for the other format, if both are to be available. For example, the Irix 5 configuration includes support for both.

Eventually, this option will support more configurations, with more fine-grained control over the assembler's behavior, and will be supported for more processors.

-nocpp

as?ignores this option. It is accepted for compatibility with the native tools.

--trap, --no-trap, --break, --no-break

Control how to deal with multiplication overflow and division by zero.?--trap?or?--no-break?(which are synonyms) take a trap exception (and only work for Instruction Set Architecture level 2 and higher);?--break?or?--no-trap?(also synonyms, and the default) take a break exception.

-n

When this option is used, as will issue a warning every time it generates a nop instruction from a macro.

MCore Options

The following options are available when?as?is configured for an MCore processor.

-jsri2bsr, -nojsri2bsr

Enable or disable the JSRI to BSR transformation. By default, this is enabled. The command line option?-nojsri2bsr?can be used to disable it.

-sifilter, -nosifilter

Enable or disable the silicon filter behavior. By default, this is disabled. The default can be overridden by the?-sifilter?command line option.

-relax

Alter jump instructions for long displacements.

-mcpu=[210|340]

Select the cpu type on the target hardware. This controls which instructions can be assembled.

-EB

Assemble for a big endian target.

-EL

Assemble for a little endian target.

PowerPC Options

The following options are available when?as?is configured for a?PowerPC?processor.

-a32

Generate ELF32 or XCOFF32.

-a64

Generate ELF64 or XCOFF64.

-K PIC

Set EF_PPC_RELOCATABLE_LIB in ELF flags.

-mpwrx | -mpwr2

Generate code for POWER/2 (RIOS2).

-mpwr

Generate code for POWER (RIOS1)

-m601

Generate code for PowerPC 601.

-mppc, -mppc32, -m603, -m604

Generate code for PowerPC 603/604.

-m403, -m405

Generate code for PowerPC 403/405.

-m440

Generate code for PowerPC 440. BookE and some 405 instructions.

-m464

Generate code for PowerPC 464.

-m476

Generate code for PowerPC 476.

-m7400, -m7410, -m7450, -m7455

Generate code for PowerPC 7400/7410/7450/7455.

-m750cl

Generate code for PowerPC 750CL.

-mppc64, -m620

Generate code for PowerPC 620/625/630.

-me500, -me500x2

Generate code for Motorola e500 core complex.

-me500mc

Generate code for Freescale e500mc core complex.

-me500mc64

Generate code for Freescale e500mc64 core complex.

-me5500

Generate code for Freescale e5500 core complex.

-me6500

Generate code for Freescale e6500 core complex.

-mspe

Generate code for Motorola SPE instructions.

-mtitan

Generate code for AppliedMicro Titan core complex.

-mppc64bridge

Generate code for PowerPC 64, including bridge insns.

-mbooke

Generate code for 32-bit BookE.

-ma2

Generate code for A2 architecture.

-me300

Generate code for PowerPC e300 family.

-maltivec

Generate code for processors with AltiVec instructions.

-mvsx

Generate code for processors with Vector-Scalar (VSX) instructions.

-mpower4, -mpwr4

Generate code for Power4 architecture.

-mpower5, -mpwr5, -mpwr5x

Generate code for Power5 architecture.

-mpower6, -mpwr6

Generate code for Power6 architecture.

-mpower7, -mpwr7

Generate code for Power7 architecture.

-mcell

Generate code for Cell Broadband Engine architecture.

-mcom

Generate code Power/PowerPC common instructions.

-many

Generate code for any architecture (PWR/PWRX/PPC).

-mregnames

Allow symbolic names for registers.

-mno-regnames

Do not allow symbolic names for registers.

-mrelocatable

Support for GCC's?-mrelocatable?option.

-mrelocatable-lib

Support for GCC's?-mrelocatable-lib?option.

-memb

Set PPC_EMB bit in ELF flags.

-mlittle, -mlittle-endian, -le

Generate code for a little endian machine.

-mbig, -mbig-endian, -be

Generate code for a big endian machine.

-msolaris

Generate code for?Solaris.

-mno-solaris

Do not generate code for Solaris.

-nops=count

If an alignment directive inserts more than count nops, put a branch at the beginning to skip execution of the nops.

s390 Options

The following options are available when?as?is configured for the s390 processor family.

-m31, -m64

Select the word size, either 31/32 bits or 64 bits.

-mesa, -mzarch

Select the architecture mode, either the Enterprise System Architecture (esa) or the z/Architecture mode (zarch).

-march=processor

Specify which s390 processor variant is the target, g6, g6, z900, z990, z9-109, z9-ec, or z10.

-mregnames, -mno-regnames

Allow or disallow symbolic names for registers.

-mwarn-areg-zero

Warn whenever the operand for a base or index register has been specified but evaluates to zero.

TMS320C6000 Options

The following options are available when?as?is configured for a TMS320C6000 processor.

-march=arch

Enable (only) instructions from architecture arch. By default, all instructions are permitted.

The following values of arch are accepted: "c62x", "c64x", "c64x+", "c67x", "c67x+", "c674x".

-mdsbt, -mno-dsbt

The?-mdsbt?option causes the assembler to generate the "Tag_ABI_DSBT" attribute with a value of 1, indicating that the code is using DSBT addressing. The?-mno-dsbt?option, the default, causes the tag to have a value of 0, indicating that the code does not use DSBT addressing. The linker will emit a warning if objects of different type (DSBT and non-DSBT) are linked together.

-mpid=no, -mpid=near, -mpid=far

The?-mpid=?option causes the assembler to generate the "Tag_ABI_PID" attribute with a value indicating the form of data addressing used by the code.?-mpid=no, the default, indicates position-dependent data addressing,?-mpid=near?indicates position-independent addressing with GOT accesses using near DP addressing, and?-mpid=far?indicates position-independent addressing with GOT accesses using far DP addressing. The linker will emit a warning if objects built with different settings of this option are linked together.

-mpic, -mno-pic

The?-mpic?option causes the assembler to generate the "Tag_ABI_PIC" attribute with a value of 1, indicating that the code is using position-independent code addressing, The "-mno-pic" option, the default, causes the tag to have a value of 0, indicating position-dependent code addressing. The linker will emit a warning if objects of different type (position-dependent and position-independent) are linked together.

-mbig-endian, -mlittle-endian

Generate code for the specified endianness. The default is little-endian.

TILE-Gx Options

The following options are available when?as?is configured for a TILE-Gx processor:

-m32 | -m64

Select the word size, either 32 bits or 64 bits.

-EB | -EL

Select the endianness, either big-endian (-EB) or little-endian (-EL).

Xtensa Options

The following options are available when?as?is configured for an Xtensa processor:

--text-section-literals?|?--no-text-section-literals

Control the treatment of literal pools. The default is?--no-text-section-literals, which places literals in separate sections in the output file. This allows the literal pool to be placed in a data?RAM/ROM. With?--text-section-literals, the literals are interspersed in the text section to keep them as close as possible to their references. This may be necessary for large assembly files, where the literals would otherwise be out of range of the "L32R" instructions in the text section. These options only affect literals referenced via PC-relative "L32R" instructions; literals for absolute mode "L32R" instructions are handled separately.

--absolute-literals?|?--no-absolute-literals

Indicate to the assembler whether "L32R" instructions use absolute or PC-relative addressing. If the processor includes the absolute addressing option, the default is to use absolute "L32R" relocations. Otherwise, only the PC-relative "L32R" relocations can be used.

--target-align?|?--no-target-align

Enable or disable automatic alignment to reduce branch penalties at some expense in code size. This optimization is enabled by default. Note that the assembler will always align instructions like "LOOP" that have fixed alignment requirements.

--longcalls?|?--no-longcalls

Enable or disable transformation of call instructions to allow calls across a greater range of addresses. This option should be used when call targets can potentially be out of range. It may degrade both code size and performance, but the linker can generally optimize away the unnecessary overhead when a call ends up within range. The default is?--no-longcalls.

--transform | --no-transform

Enable or disable all assembler transformations of Xtensa instructions, including both relaxation and optimization. The default is?--transform;?--no-transform?should only be used in the rare cases when the instructions must be exactly as specified in the assembly source. Using?--no-transform?causes out of range instruction operands to be errors.

--rename-section oldname=newname

Rename the oldname section to newname. This option can be used multiple times to rename multiple sections.

Z80 Options

The following options are available when?as?is configured for a Z80 family processor:

-z80

Assemble for Z80 processor.

-r800

Assemble for R800 processor.

-ignore-undocumented-instructions, -Wnud

Assemble undocumented Z80 instructions that also work on R800 without warning.

-ignore-unportable-instructions, -Wnup

Assemble all undocumented Z80 instructions without warning.

-warn-undocumented-instructions, -Wud

Issue a warning for undocumented Z80 instructions that also work on R800.

-warn-unportable-instructions, -Wup

Issue a warning for undocumented Z80 instructions that do not work on R800.

-forbid-undocumented-instructions, -Fud

Treat all undocumented instructions as errors.

-forbid-unportable-instructions, -Fup

Treat undocumented Z80 instructions that do not work on R800 as errors.

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